Figure illustrates the V-I charactefistics of a PN-junction diode. The charactefistics curve contains three distinct regions as,

1. Forward bias region
2. Reverse bias region
3. Breakdown region.

Forward Bias Region: On forward biasing, P side of the PN-junction is connected to the positive of the voltage supply and N side of the PN-junction is connected to the negative of the voltage supply. Simply, forward bias region is the characteristics of the diode for V > 0. From figure it can be seen that (in the FB region) initially, the diode current is very small because the barrier potential prevents the flow of current through it. If the applied voltage exceeds the barrier potential, then for a small increase in the voltage produces a shall) increase in the current. The voltage at which the current starts to increase rapidly is called cut-in or knee voltage of the diode. It is denoted as V_γ.

For silicon diode V_γ = 0.7 V and Germanium diode V_γ = 0.3V.

Reverse Bias Region: On reverse biasing, P side of the PN-junction is connected to the negative terminal of the voltage supply and N side of the PN-junction is connected to the positive terminal of the voltage supply. Simply, reverse bias region is the characteristics of the diode for V < 0. From figure it can be seen that (in RB region) the diode current is very small, almost equal to zero for all values of voltage less than the break down voltage V_Z. This is because in reverse bias the width of the potential barrier increases. As a consequence, the junction resistance becomes very high and practically no current flows through the circuit.

Breakdown Region: The diode enters the breakdown region when the magnitude of the reverse voltage exceeds a threshold value of that particular diode called the breakdown, voltage. In this region for very small variation in voltage the current increases rapidly as shown in figure. PN Diode should not be operated for V_R > V_BD because the diode will be damaged.

VI Characteristics of Ideal Diode

The deviation of V-I characteristics of pn junction diode from its ideal characteristics is illustrated below.

Figure 2.

The ideal and practical characteristics of p-n junction diode is shown in figure 2 (a) and (b) respectively.

1. When diode is forward biased.

(i) For ideal p-n diode, the forward resistance is zero. As a result, the diode acts as short circuit i.e., V = 0 and is remain unchanged for any value of ‘I’.

(ii) The practical p-n diode offers small forward resistance (i.e., static and dynamic resistance). Hence as voltage increases beyond barrier potential current also increases rapidly as shown in figure (b).

2. When diode is reverse biased.

(i) The ideal p-n diode offers infinite resistance. In this case the diode acts as open circuit i.e., current flowing through the diode is zero and the reverse voltage becomes infinite. An ideal diode does not undergo any breakdown, since the current is zero for any value of reverse voltage.

(ii) In a practical p-n diode, for an applied reverse voltage small amount of current flows due to minority charge carriers in both the regions. When the voltage increases above breakdown voltage (V_BD). The maximum reverse saturation current flows in diode. As a consequence it gets destroyed.

Note: PN Junction diode should be operated for V_R < V_BD.

The post VI Characteristics of PN Junction Diode – Explanation & Diagram appeared first on ElectricalWorkbook.

Figure 1: N-Channel Depletion MOSFET.

Construction of N-Channel Depletion MOSFET

Figure 2.

The N-channel depletion MOSFET is constructed on a P-type silicon substrate as shown in figure (2). The substrate is a single crystal silicon wafer that provides physical support for the device.

Figure 3.

Two heavily doped n-regions are diffused into the substrate as shown in figure (3). The n-regions are indicated as N⁺ in the figure. The two regions N⁺ act as source and drain for the MOSFET. Further, between the two N⁺ regions, that is, source and drain, an N-channel is implanted as shown in figure (3).

Figure 4.

A thin layer of silicon dioxide (SiO₂) that is an electrical insulator grown on the surface of the substrate through oxidation process is shown in figure (4). The formation of metal and oxide layer creates a MOS capacitor. The metal of the gate and the semiconductor acts as plates of capacitor and the oxide layer acts as insulator of the MOS capacitor. Finally, metal is deposited on top of the oxide layer to form the gate electrode of the device. Metal contacts are also made to the source region, the drain region and the substrate. The device is packed and four terminals namely gate terminals (G), source terminals (S), drain terminals (D), and the substrate (also known as body) terminals (B) are taken out as shown in figure (1).

Working of N-Channel Depletion MOSFET

The principle of operation of MOSFET depends on the MOS capacitor. D-MOSFET requires the gate-source voltage, V_GS to switch the device ‘OFF’. The operation of D-MOSFET is as follows,

Initially, when gate to source voltage V_GS is equal to zero and a positive voltage is applied between drain and source, V_DS then the charge carriers i.e., electrons in the N-channel are attracted by the positive terminals of the drain-to-source voltage. There is a flow of current through the N-channel between the two N⁺ regions. When gate-to-source voltage is made negative and a positive voltage is applied between drain and source, V_DS, the electrons in the N-channel are repelled by the negative terminal of gate to source voltage and the holes which are majority carriers in p-substrate are attracted by the negative terminal of gate to source voltage. In the process, electrons moving away from the gate terminals recombine with holes moving towards the gate terminal. As a consequence, the total number of free electrons involving in the conduction of cm-rent are reduced. This in turn reduces the current I_D flowing through the device. Finally, at V_GS = V_GS(off) ,I_D becomes zero and the device operates same as JFET.

Figure 5: VI Characteristics of N-Channel Depletion MOSFET.

In contrast to the JFET, the D-MOSFET can be operated for positive value of gate to source voltage V_GS. This is because of the insulation of gate terminal from the semiconductor body. Increase in the value of positive gate voltage increases the number of free electrons flowing through the channel. This in tum increases the current I_D. The characteristics of D-MOSFET is shown in figure (5).

The post What is N-Channel Depletion MOSFET? Construction, Working, Circuit Diagram & VI Characteristics appeared first on ElectricalWorkbook.

The circuit arrangement of square wave generator is as shown in figure (1). A square wave is generated when the output of op-amp swings between +V_sat and -V_sat. The output of the op-amp depends on the differential voltage V_D. If the differential voltage is negative, the op-amp output is in positive saturation. If V_D is positive, the op-amp output is in negative saturation.

When the supply voltages are applied, the voltage across the capacitor is zero. So, the inverting terminal voltage is zero initially It means that the voltage at V₂ is zero, and the non-inverting voltage is very small and is a function of output offset voltage. So, the differential voltage,

\[{{V}_{D}}={{V}_{1}}-{{V}_{2}}\]

Since, V₂ = 0

\[{{V}_{D}}={{V}_{1}}\]

In the square wave generator, the op-amp is driven into the saturation region by the non-inverting voltage, V₁. If V₁ is positive, C₁ acts as a short circuit and starts disconnecting rapidly. Since, the op-amp gain is very large, the output is driven to +V_sat by the non-inverting terminal voltage. The resistor R drives the capacitor C₁ to start charging towards +V_sat then, the voltage V₁ is slightly more positive than V₂ the output is forced to switch to -V_sat Then, the voltage across non-inverting terminal is expressed as,

\[{{V}_{1}}=\frac{{{R}_{1}}}{{{R}_{1}}+{{R}_{2}}}(-{{V}_{sat}})\]

Therefore, the differential voltage (V_D = V₁ – V₂) is negative and holds till C₁ discharges the output at negative saturation. At negative voltage, the capacitor starts charging with voltage higher than -V₁. The positive V_D drives the op-amp output back to +V_sat. Hence, the non-inverting input voltage is given by,

\[{{V}_{1}}=\frac{{{R}_{1}}}{{{R}_{1}}+{{R}_{2}}}(+{{V}_{sat}})\]

\[T=2R{{C}_{1}}ln\left( \frac{2{{R}_{1}}+{{R}_{2}}}{{{R}_{2}}} \right)\]

Where,

T = Output waveform time period

Output frequency f₀ is given by,

\[{{f}_{0}}=\frac{1}{T}Hz\]

\[=\frac{1}{2R{{C}_{1}}ln\left[ (2{{R}_{1}}+{{R}_{2}})/{{R}_{2}} \right]}\]

If R₂ = 1.16 R₁, then,

\[{{f}_{0}}=\frac{1}{2\pi R{{C}_{1}}}\text{   Hz}\]

The waveforms of square wave generator are shown in figure (2).

The post What is Square Wave Generator using Op-Amp? Circuit Diagram, Derivation & Working appeared first on ElectricalWorkbook.

Types (or Methods) of Transistor Biasing

To accomplish this various biasing circuits are designed and the list of which is as follows,

1. Fixed bias circuit
2. Collector to base bias
3. Potential divider bias.

Fixed Bias Circuit

Fixed bias is also known as base resistor bias. In this, a common emitter amplifier is biased by connecting a resistor ‘R_B‘ across the base and power supply terminals as shown in the figure below,

Applying KVL at the input side of the circuit in figure,

\[{{V}_{CC}}={{I}_{B}}{{R}_{B}}+{{V}_{BE}}…(1)\]

Rearranging equation (1),

\[{{I}_{B}}=\frac{{{V}_{CC}}-{{V}_{BE}}}{{{R}_{B}}}…(2)\]

The above equation is independent of I_C.

Differentiating equation (2) with respect to I_C,

\[\frac{d{{l}_{B}}}{d{{l}_{C}}}=0…(3)\]

The expression for stability factor ‘S’ for a CE configuration is,

\[S=\frac{1+\beta }{1-\beta \left( \frac{d{{l}_{B}}}{d{{l}_{C}}} \right)}…(4)\]

Using equation (3), equation (4) can be written as,

\[S=\frac{1+\beta }{1-\beta (0)}\] \[S=1+\beta \]

Since β is a large quantity, S is also very high. As a result, the circuit is very poor in stability. In practice, this circuit is not used for biasing the base.

Advantages of Fixed Bias Circuit

1. The circuit is very simple.
2. Number of components required are less.

Disadvantage Fixed Bias Circuit

1. The circuit has very high value of stability factor S.
2. Therefore it is highly unstable.

Collector to Base Bias

In this CE amplifier is biased by connecting a resistance ‘R_B‘ across the collector and base terminals as shown in figure below.  From the figure, it is clear that collector to base voltage forward biases the BE junction. Therefore sufficient base current flows through the base resistance ‘R_B‘ and it causes zero signal collector current flowing in the circuit.

Applying KVL at the input side of circuit is shown in figure.

\[{{V}_{CC}}={{I}_{C}}{{R}_{C}}+{{I}_{B}}{{R}_{B}}+{{V}_{BE}}\]

And

\[{{I}_{C}}=\beta {{I}_{B}}\]

Then,

\[{{V}_{CC}}=\beta {{I}_{B}}{{R}_{C}}+{{I}_{B}}{{R}_{B}}+{{V}_{BE}}\]

\[{{I}_{B}}{{R}_{B}}={{V}_{CC}}-\beta {{I}_{B}}{{R}_{C}}-{{V}_{BE}}\]

\[{{R}_{B}}=\frac{{{V}_{CC}}-\beta {{I}_{B}}{{R}_{C}}-{{V}_{BE}}}{{{I}_{B}}}\]

Base resistance,

\[{{R}_{B}}=\frac{{{V}_{CC}}-\beta {{I}_{B}}{{R}_{C}}-{{V}_{BE}}}{{{I}_{B}}}\]

Alternatively,

\[{{V}_{CE}}={{V}_{BE}}+{{V}_{CB}}\]

\[{{R}_{B}}=\frac{{{V}_{CB}}}{{{I}_{B}}}=\frac{{{V}_{CE}}-{{V}_{BE}}}{{{I}_{B}}}\]

Thus,

\[{{R}_{B}} =\frac{{{V}_{CE}}-{{V}_{BE}}}{{{I}_{B}}}\]

Advantages of Collector to Base Bias Circuit

1. It is easy and simple to design.
2. It requires only ‘R_B‘ for biasing.

Disadvantage Collector to Base Bias Circuit

1. The circuit provides negative feedback that reduces the gain of an amplifier.
2. Stability factor is fairly high.

Voltage Divider Bias (or) Self Bias

The most extensively used biasing circuit for maintaining stabilization is voltage divider bias circuit. It is as shown in figure.  The circuit contains two resistors R₁ and R₂ connected to V_CC in the base section of the transistor. The voltage drop across the resistor R₂ forward biases the emitter base junction. The resistor R_E connected to the emitter grants stabilization.

The current flowing through the resistance ‘R₁‘ is I₁. Since, the current flowing through the base is very small it can be assumed that the same current I₁ flows through resistance by R₂. Therefore I₁ is given as,

\[{{I}_{1}}=\frac{{{V}_{CC}}}{{{R}_{1}}+{{R}_{2}}}\]

Further, since same current I₁ is flowing through R₁ and R₂ it can be assumed that R₁ and R₂ are in series. Therefore, by using voltage division rule, the voltage drop across R2 is given as,

\[{{V}_{2}}=\left( \frac{{{R}_{2}}}{{{R}_{1}}+{{R}_{2}}} \right).{{V}_{CC}}…(4)\]

Apply KVL to the loop 2 shown in figure.

\[{{V}_{2}}={{V}_{BE}}+{{V}_{E}}\]

\[{{V}_{2}}={{V}_{BE}}+{{I}_{E}}{{R}_{E}}\]

\[{{I}_{E}}=\frac{{{V}_{2}}-{{V}_{BE}}}{{{R}_{E}}}\]

Thus,

\[{{I}_{E}}=\frac{{{V}_{2}}-{{V}_{BE}}}{{{R}_{E}}}\]

Generally for a CE configuration I_E ≈ I_C. Hence equation (4) can be written as,

\[{{I}_{C}}=\frac{{{V}_{2}}+{{V}_{BE}}}{{{R}_{E}}}…(5)\]

Where,

V₂ – Voltage drop across ‘R₂‘

V_BE – Base emitter voltage.

Applying KVL to the output side of the circuit in figure,

\[{{V}_{CC}}={{I}_{C}}{{R}_{C}}+{{V}_{CE}}+{{V}_{E}}\]

\[{{V}_{CC}}={{I}_{C}}{{R}_{C}}+{{V}_{CE}}+{{I}_{E}}{{R}_{E}}\]

\[={{I}_{C}}({{R}_{C}}+{{R}_{E}})+{{V}_{CE}}\text{    (}{{I}_{C}}\approx {{I}_{E}}\text{)}\]

\[={{V}_{CE}}+{{I}_{C}}({{R}_{C}}+{{R}_{E}})\]

\[{{V}_{CE}}={{V}_{CC}}-{{I}_{C}}({{R}_{C}}+{{R}_{E}})\]

The circuit provides good stabilization through resistance ‘R_E‘. It is explained using equation (5), that is,

\[{{V}_{2}}={{V}_{BE}}+{{I}_{C}}{{R}_{E}}\]

In the above expression, voltage V₂ (across R₂) is independent of I_C and is given as,

\[{{V}_{2}}=\left( \frac{{{V}_{CC}}}{{{R}_{1}}+{{R}_{2}}} \right){{R}_{2}}\]

Since R₁, R₂ and V_CC are constant, V₂ is also constant. An increase in I_C causes an increase in potential across R_E (that is, I_CR_E). Since, V₂ is constant an increase in I_CR_E must be compensated by a decrease in V_BE Therefore, an increase in I_CR_E causes V_BE to decrease and vice versa. In this manner the circuit provides good stabilization.

Advantages of Voltage Divider Bias Circuit

1. It is most popular biasing circuit.
2. Simple ‘R_E‘ resistance provides good stability.
3. Stability factor (S) in controlled by R_E and R_th.
4. Stability factor is small for this circuit compared to other techniques.

The post What is Transistor Biasing? Circuit Diagram & Types (Fixed Bias, Collector to Base Bias, Voltage Divider Bias) appeared first on ElectricalWorkbook.

Figure 1: Common Emitter (CE) Configuration.

The configuration in which emitter is common to both sides of configuration is known as common emitter configuration.

An NPN transistor arranged in Common Emitter (CE) configuration is as shown in figure (1). In this connection the base collector and emitter act as input, output and common terminals respectively. The emitter is at ground potential. Hence this configuration is also referred by the name grounded-emitter configuration.

Characteristics of Common Emitter (CE) Configuration

The arrangement of an NPN transistor in common-emitter configuration is as shown in figure (2).

Figure 2: CE Configuration.

Input Characteristics

Figure 3: Input characteristics of CE transistor Configuration.

The curve plotted between base current I_B and base-emitter voltage V_BE keeping collector-emitter voltage V_CE constant, gives the input characteristics of CE configuration.

The input characteristics of transistor in common-emitter configuration is as shown in figure (2).

It can be observed from figure (3), that input characteristics of CE transistor are drawn by taking V_BE along the x-axis and I_B along the y-axis.

The input characteristics of CE transistor are similar to the forward characteristics of a PN junction diode (i.e., for increase in V_BE value, I_B also increases gradually). Therefore, a higher order of resistance is observed at its input.

At constant V_CE the ratio of change in base-emitter voltage ΔV_BE to change in base current ΔI_B gives the input resistance of CE transistor.

\[{{r}_{i}}={{\left. \frac{\Delta {{V}_{BE}}}{\Delta {{I}_{B}}} \right|}_{{{V}_{CE}}=\text{ Constent}}}\]

Output Characteristics

Figure 4: Output characteristics of CE transistor Configuration.

The curve plotted between collector current ‘I_C‘ and collector-emitter voltage ‘V_CE‘ , keeping base current ‘I_B‘ constant gives the output characteristics of CE configuration. The output characteristics of transistor in common emitter configuration is as shown in figure (4). It can be observed from figure (4), that output characteristics of CE transistor are drawn by taking V_CE along the x-axis and I_C along the y-axis.

The collector current ‘I_C‘ varies only for low values of V_CE (i.e., between 0 and 1V), after which it becomes constant. The value of voltage till which I_C depends on V_CE is referred to as ‘knee voltage’. The CE transistor operates only in the region above knee voltage.

A small increase in I_C with increasing V_CE after the knee voltage, is only due to wider collector depletion layer. When V_CE exceeds the knee voltage, then, I_C ≈ βI_B

At constant I_B the ratio of change in collector-emitter voltage ‘ V_CE‘ to the change in collector current I_C gives the output resistance of CE transistor.

\[{{r}_{o}}={{\left. \frac{\Delta {{V}_{CE}}}{\Delta {{I}_{C}}} \right|}_{{{I}_{B}}=\text{ Constent}}}\]

Output Current:

When a transistor is operated in active region, its emitter is forward biased and collector is reverse biased. The collector current, I_C is influenced by the emitter current (I_E) and collector voltage (V_C). This can be observed in the general expression of IC given by,

\[{{I}_{C}}=-\alpha {{I}_{E}}+{{I}_{CBO}}\left( 1-\exp \frac{{{V}_{c}}}{{{V}_{T}}} \right)…(1)\]

Where,

α = Large signal current gain

For, V_C = Negative values of and |V_C| >> V_T 

\[{{I}_{C}}=-\alpha {{I}_{E}}+{{I}_{CBO}}…(2)\]

For low values of V_C or V_CB, I_C becomes independent of V_C i.e., collector current (I_C) is equal to α times the emitter current (I_E).

Due to the opposite directions of l_C and I_E.

\[{{I}_{E}}=-({{I}_{C}}+{{I}_{B}})\]

Substituting ‘I_E‘ in equation (2),

\[{{I}_{C}}=-\alpha (-({{I}_{C}}+{{I}_{B}})+{{I}_{CBO}}\]

\[=\alpha ({{I}_{C}}+{{I}_{B}})+{{I}_{CBO}}\]

\[{{I}_{C}}=\alpha {{I}_{C}}+\alpha {{I}_{B}}+{{I}_{CBO}}\]

\[{{I}_{C}}-\alpha {{I}_{C}}=\alpha {{I}_{B}}+{{I}_{CBO}}\]

\[(1-\alpha ){{I}_{C}}=\alpha {{I}_{B}}+{{I}_{CBO}}\]

\[{{I}_{C}}=\frac{\alpha }{1-\alpha }{{I}_{B}}+\frac{1}{1-\alpha }{{I}_{CBO}}\]

Since,

\[\beta =\frac{\alpha }{1-\alpha }\] And  \[\alpha =\frac{\beta }{1+\beta }\]

\[1-\alpha =1-\frac{\beta }{1+\beta }\]

\[=\frac{1+\beta -\beta }{1+\beta }=\frac{1}{1+\beta }\]

Thus,

\[{{I}_{C}}=\beta {{I}_{B}}+(1+\beta ){{I}_{CBO}}\]

The post What is Common Emitter (CE) Configuration of Transistor? Circuit Diagram, Derivation, Input & Output Characteristics appeared first on ElectricalWorkbook.

Figure 1: Common Base (CB) Configuration.

The configuration in which base is common to both the input and output sides is known as ‘common base configuration’.

An NPN transistor arranged in Common Base (CB) configuration is as shown in figure (l). In this connection the emitter, collector and base act as input, output and common terminals respectively. The base is at ground potential. Hence this configuration is also referred by the name grounded-base configuration. The voltages at the collector and emitter terminals are measured with respect to base.

Characteristics of Common Base (CB) Configuration

The arrangement of an NPN transistor in common base configuration is as shown in figure (2).

Figure 2: CB Configuration.

Input Characteristics

Figure 3: Input characteristics of CB transistor Configuration.

The curve plotted between emitter-base voltage (V_EB) and emitter current (I_E) keeping collector-base voltage (V_CE) constant is known as input characteristics of CB transistor.

The input characteristics of BJT in common base configuration is as shown in figure (2).  From figure (3), it can be observed that I_E is the input current, V_EB is the input voltage and V_CB is the output voltage.

(i) Initially, the emitter-base junction of BJT is forward biased and V_CB is kept at zero volts. The resultant input characteristics resembles with the forward characteristics of p-n diode, such that for a small increase in V_BE a rapid increase in I_E is observed.

(ii) On increasing the value of V_CB from zero volts, keeping V_EB constant, a decrease in the width of base region is observed. This effect is known as early effect. This intern increases the I_E For every increase in V_CB value, the curve shifts towards the left.

Output Characteristics

Figure 4: Output characteristics of CB transistor Configuration.

The curves plotted between collector- base voltage (V_CB) and collector current (I_C), keeping the emitter current (I_E) constant is known as output characteristics of CB transistor.

The output characteristics of BJT in CB configuration is as shown, in figure (4).  From figure (4), it can be observed that, I_C is the output current, V_CB is the output voltage and I_E is the input current.

The output characteristics of a transistor are divided into three regions as shown in figure (4).

Active Region: In this region the emitter junction is forward biased and collector junction is reverse biased. It lies between the saturation and cut-off regions of transistor.

Saturation Region: In this region both the emitter and collector junctions are forward biased. It usually lies to the left of the ordinate V_CB = 0.

Cut-off Region: In this region both the emitter and collector junctions are reverse biased. This region lies below I_E = 0.

From the output characteristic curves it can be observed

(a) The collector current varies only for low values of V_CB (i.e., < 1 V). At higher values of V_CB, I_C becomes constant as indicated by the straight parallel curves. Thus IC depends only on I_E

(b) For large variation in V_CB, only a small variation occurs in I_C. This implies that there exists a very high value of output resistance.

Current Gain in Common Base (CB) Configuration

The ratio of collector current (I_C) to the emitter current (I_E) gives the common base D.C current gain of transistor. It is denoted by α, α_dc or h_fb and can be expressed as,

\[\alpha =\frac{{{I}_{C}}}{{{I}_{E}}}…(1)\]

Since I_C is smaller than I therefore u is always less than unity.

Equation (1) can be rewritten as,

\[{{I}_{C}}=\alpha {{I}_{E}}…(2)\]

From the I_E, I_B and I_C relationship,

\[{{I}_{E}}={{I}_{B}}+{{I}_{C}}…(3)\]

Since collector current I_C is also produced by the thermally generated carriers as leakage current I_CO.  The total collector current is given as,

\[{{I}_{C}}=\alpha {{I}_{E}}+{{I}_{CO}}…(4)\]

\[\alpha {{I}_{E}}={{I}_{C}}-{{I}_{CO}}\]

\[\alpha =\frac{{{I}_{C}}-{{I}_{CO}}}{{{I}_{E}}}…(5)\]

Substituting equation (3) in eqautions (5),

\[\alpha =\frac{{{I}_{C}}-{{I}_{CO}}}{{{I}_{B}}+{{I}_{C}}}\]

\[\alpha ({{I}_{B}}+{{I}_{C}})={{I}_{C}}-{{I}_{CO}}\]

\[{{I}_{C}}=\alpha ({{I}_{B}}+{{I}_{C}}){{I}_{CO}}\]

\[(1-\alpha ){{I}_{C}}=\alpha {{I}_{B}}+{{I}_{CO}}\]

\[{{I}_{C}}=\frac{\alpha {{I}_{B}}}{1-\alpha }+\frac{{{I}_{CO}}}{1-\alpha }\]

This is the required output current i.e., collector current of a common-base transistor.

The post What is Common Base (CB) Configuration of Transistor? Circuit Diagram, Derivation, Input & Output Characteristics appeared first on ElectricalWorkbook.

Figure (1): Summing Amplifier.

A summer or an adder circuit which provides non-inverted sum of the input signals is called non-inverting summing amplifier. The circuit diagram of a two input non-inverting type summing amplifier is shown in figure (1).

In figure (1). Assuming that the voltage at node ‘B’ be V_B then, the node ‘A’ is at the same potential as that of ‘B’.

\[{{V}_{A}}={{V}_{B}}\]

From the input side,

\[{{I}_{1}}=\frac{{{V}_{1}}-{{V}_{B}}}{{{R}_{1}}}\text{   }\]

And

\[\text{    }{{I}_{2}}=\frac{{{V}_{2}}-{{V}_{B}}}{{{R}_{2}}}\]

But as the input current of op-amp is zero,

\[{{I}_{1}}+{{I}_{2}}=0\]

\[\frac{{{V}_{1}}-{{V}_{2}}}{{{R}_{1}}}+\frac{{{V}_{2}}-{{V}_{B}}}{{{R}_{2}}}=0\]

\[\frac{{{V}_{1}}}{{{R}_{1}}}+\frac{{{V}_{2}}}{{{R}_{2}}}={{V}_{B}}\left[ \frac{1}{{{R}_{1}}}+\frac{1}{{{R}_{2}}} \right]\]

\[{{V}_{B}}=\frac{{{R}_{2}}{{V}_{1}}+{{R}_{1}}{{V}_{2}}}{{{R}_{1}}+{{R}_{2}}}….(1)\]

At node A,

\[I=\frac{{{V}_{A}}}{{{R}_{{}}}}=\frac{{{V}_{B}}}{{{R}_{{}}}}\text{     }\left( {{V}_{B}}={{V}_{A}} \right)….(2)\]

And

\[I=\frac{{{V}_{0}}-{{V}_{A}}}{{{R}_{F}}}=\frac{{{V}_{0}}-{{V}_{B}}}{{{R}_{F}}}….(3)\]

Equating the equation (2) and (3), we get,

\[\frac{{{V}_{B}}}{R}=\frac{{{V}_{0}}-{{V}_{B}}}{{{R}_{F}}}\]

\[\frac{{{V}_{0}}}{{{R}_{F}}}={{V}_{B}}\left[ \frac{1}{{{R}_{{}}}}+\frac{1}{{{R}_{F}}} \right]\]

\[{{V}_{0}}={{V}_{B}}\left[ \frac{R+{{R}_{F}}}{R} \right]….(4)\]

Substituting equation (1) and (4), we get,

\[{{V}_{0}}=\frac{\left( {{R}_{2}}{{V}_{1}}+{{R}_{1}}{{V}_{2}} \right)\left( R+{{R}_{F}} \right)}{R\left( {{R}_{1}}+{{R}_{2}} \right)}\]

\[{{V}_{0}}=\frac{{{R}_{2}}\left( {{R}_{{}}}+{{R}_{F}} \right)}{R\left( {{R}_{1}}+{{R}_{2}} \right)}{{V}_{1}}+\frac{{{R}_{1}}\left( {{R}_{{}}}+{{R}_{F}} \right)}{R\left( {{R}_{1}}+{{R}_{2}} \right)}{{V}_{2}}\]

If \[{{R}_{1}}={{R}_{2}}=R={{R}_{F}},\] we get

\[{{V}_{0}}={{V}_{1}}+{{V}_{2}}\]

As there is no phase difference between the input and output. It is non-inverting summer amplifier.

Figure (2): Summing Amplifier with n inputs.

The circuit diagram of summing amplifier with n number of inputs with grounded inverting terminal is as shown in figure (2). It produces an output voltage as a linear addition of all the inputs.

At node A,

\[I=\frac{{{V}_{1}}}{{{R}_{1}}}+\frac{{{V}_{2}}}{{{R}_{2}}}+…….\frac{{{V}_{n}}}{{{R}_{n}}}\]

Since, V_o= – R_fI

\[=-\left[ {{V}_{1}}\frac{{{V}_{f}}}{{{R}_{1}}}+{{V}_{2}}\frac{{{V}_{f}}}{{{R}_{2}}}+…..{{V}_{n}}\frac{{{V}_{f}}}{{{R}_{n}}} \right]\]

If R₁ = R₂=…. R_n = R, then, we get

\[Vo=-\frac{{{R}_{f}}}{R}\left( {{V}_{1}}+{{V}_{2}}+…..+{{V}_{n}} \right)\]

The post What is Summing Amplifier using Op-Amp? Circuit Diagram, Derivation & Working appeared first on ElectricalWorkbook.

A non-inverting amplifier, whose gain is equal to 1, acts as a voltage follower. The circuit includes an op-amp and a wire connecting the output and input terminals. A non- inverting amplifier configured as voltage follower is illustrated in figure below.

Figure 1: Voltage Follower.

In the above figure, since the complete output is feedback to the inverting input. the gain of the circuit becomes. The output voltage of a non-inverting amplifier is given by,

\[{{V}_{out}}=\left( 1+\frac{{{R}_{F}}}{{{R}_{1}}} \right){{V}_{in}}\]

Since R_F = 0, R₁ = ∞, we get

\[{{V}_{out}}={{V}_{in}}\]

Features of Voltage Follower

1. The input impedance is high i.e., in the order of MΩ. Hence, it draws negligible current from signal source.
2. Due to its low output impedance, it can be used as buffer for connecting high impedance source to a low impedance load.
3. Voltage follower has large bandwidth.
4. The voltage follower circuit output follows the input precisely with zero phase shift.
5. It has unity gain.

Applications of Voltage Follower

In instrumentation amplifier, loading effect of transducer is eliminated by using voltage follower between transducer and amplifier.

The post What is Voltage Follower using Op-Amp? Circuit Diagram, Derivation & Working appeared first on ElectricalWorkbook.

Figure 1: RC Phase Shift Oscillator.

Circuit Diagram of RC Phase Shift Oscillator

The circuit diagram of RC Phase Shift Oscillator is as shown in figure 1. It can be observed from figure 1 that the RC phase shift oscillator employs an n-p-n transistor (Q) in CE configuration. It also consists of a feedback or phase shift network containing three identical RC sections. At a particular frequency, each RC section of the feedback network produces a phase shift of 60º. Thus, the total phase shift produced by the RC network is 3 x 60º= 180º. Moreover, the transistor (or CE amplifier) also provides a phase shift of 180º to the applied input. Thus the total shift in the circuit becomes 360º or 0º.

Working of RC Phase Shift Oscillator

The supply voltage (V_cc) produces variations in the base of the transistor. These variations get amplified at the collector output and applied to the RC feedback network. The feedback network produces a phase shift of 180º and outputs a voltage E_i to the transistor amplifier. The CE transistor amplifier produces a phase shift of 180º. Hence, the total phase shift becomes 360º, which is the essential condition for sustained oscillations. The expression for frequency of oscillations of RC phase shift oscillator is given by,

\[f=\frac{1}{2\pi RC\sqrt{6}}=\frac{0.065}{RC}\]

Advantages of RC Phase Shift Oscillator

1. As RC oscillator contains lumped elements, it is less expensive and the circuit is simple.
2. It is used as a audio signal generator.
3. It has high frequency stability
4. It can be operated over a frequency range of several kHz.
5. The output of RC oscillator is mostly distortion free.
6. It does not require any feedback for stabilization.

Disadvantages of RC Phase Shift Oscillator

1. The frequency stability of RC oscillator is less than that of Wien bridge oscillator.
2. Due to smaller feedback it provides small output.
3. In RC oscillator, there is a difficulty in generating oscillations due to small feedback signal
4. It requires high voltage batteries.

The post What is RC Phase Shift Oscillator? Circuit Diagram, Working & Frequency Formula appeared first on ElectricalWorkbook.

Figure 1: Negative Feedback Amplifier.

The concept of feedback plays a significant role in electronic components. The basic parameters namely input impedance, output impedance, bandwidth, current or voltage gain can be varied accordingly with the help of feedback, figure 1 illustrates the block diagram of an amplifier with feedback.

Here,

A – Gain of the basic amplifier

β – Feedback ratio

A_f – Gain of the feedback amplifier

X_s – signal in the input side (current or voltage)

X_f – Feedback signal (current or voltage).

Initially, the signal X_s from the signal source is fed as input to the mixer network. The output (either voltage or current) signal is sampled by an appropriate sampling network (voltage sampler or current sampler) and then applied to the feedback network. The output of feedback signal X_f combines with the source signal X_s in the mixer network i.e., X_s ± X_f = X_i and is given as input to the basic amplifier.

When the feedback signal (X_f) is out of phase with the source signal (X_s) then such type of feedback is referred to as negative feedback or degenerative feedback amplifier.

Closed Loop Gain of Negative Feedback Amplifier

In negative feedback amplifier, the total effect of feedback decreases the input signal of the amplifier (i.e., X_i = X_s – X_f) which in turn decreases the input voltage of the amplifier. As a result, the output voltage also decreases. The gain of the amplifier with negative feedback is,

\[{{A}_{f}}=\frac{{{X}_{o}}}{{{X}_{s}}}\]

\[=\frac{{{X}_{o}}}{{{X}_{i}}+{{X}_{f}}}\text{   }\left[ {{X}_{i}}={{X}_{s}}-{{X}_{f}}\right]\]

\[{{A}_{f}}=\frac{1}{\frac{{{X}_{i}}}{{{X}_{o}}}+\frac{{{X}_{f}}}{{{X}_{o}}}}\]

Since,

\[A=\frac{{{X}_{o}}}{{{X}_{s}}}\]

And

\[\beta =\frac{{{X}_{f}}}{{{X}_{o}}}\]

\[{{A}_{f}}=\frac{1}{\frac{1}{A}+\beta}=\frac{A}{1+A\beta }\]

\[{{A}_{f}}=\frac{A}{1+A\beta }\]

Characteristics of Negative Feedback Amplifier

The amplifier general characteristics and effects of negative feedback are as follows,

Stabilization of Gain: The gain of a negative voltage feedback amplifier is given by,

\[{{A}_{V}}=\frac{A}{1+\beta A}\]

Where,

A – Voltage gain of amplifier

β – Feedback ratio.

\[{{A}_{V}}=\frac{A}{\beta A}\left[ \beta A>>1 \right]\]

\[{{A}_{V}}=\frac{1}{\beta }\]

It can be observed that the gain depends on feedback factor in a voltage divider network. Temperature, transistor parameters and frequency changes do not affect the gain. Hence, the gain of the amplifier remains stable.

Reduction of Non-linear Distortion: Negative voltage feedback amplifier reduces non-linear distortions in large signal amplifiers occurred due to the variations in voltage gam.

\[{{D}_{{{V}_{F}}=}}\frac{D}{1+A\beta }\]

Where, D – Distortion in amplifier without feedback

D_VF – Distortion in amplifier with feedback

Hence, from equation (1), It can be observed that the distortion in amplifier reduces by a factor 1 + Aβ.

Improvement in Frequency Response or Increases Bandwidth: The negative feedback in an amplifier increases the upper cut-off frequency by (1 + Aβ) and decreases lower cut-off frequency by (1 + Aβ), which results increase in the bandwidth by a factor of (1 + Aβ).

Increase in Circuit Stability: The stability of the circuit increases inspective of temperature changes or other. When the output of negative feedback amplifier varies due to temperature amplification is either increased or decreased. The circuits thus opposes such increased or decreased amplification and hence adjusts the circuit to achieve stability.

Increase in Input Impedance and Decrease in Output Impedance: Negative feedback in an amplifier increases input impedance by a factor of (1 + Aβ) and decreases output impedance by a factor of (1 + Aβ).

Advantages of Negative Feedback Amplifier

The advantages of negative feedback amplifiers are given as follows,

1. In negative feedback amplifiers, the voltage gain of an amplifier remains stable.
2. It reduces the non-linear distortion produced in large signal amplifiers.
3. It improves the frequency response of the amplifier.
4. It increases the stability of the circuit.
5. Negative feedback increases the input impedance and decreases the output impedance of the amplifier.
6. It decreases the noise voltage in the amplifier.

Disadvantages of Negative Feedback Amplifier

The main disadvantage of using negative or degenerative feedback in amplifier is reduction in gain. The required gain can be attained by increasing the number of amplifier stages.

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